1. Field of the Invention
This invention relates to semiconductor apparatus, and more particularly to semiconductor devices for analog-to-digital conversion.
2. Description of the Prior Art
In the field of telephone communications, it is desirable to convert an input analog signal into a binary digital output signal, in order to perform more cheaply such signal processing functions during transmission as amplification at various points along the transmission path. On the other hand, present-day analog-to-digital converters themselves tend to be expensive, owing to their hybrid structures with precise required tolerances, that is, structures requiring very accurate elements not in the form of compact integrated circuits.
As is well known in the art of charge coupled devices (CCD), a potential "well" in a surface region of a semiconductor body can be formed in response to a suitable voltage that is applied to an overlying electrode separated from the surface of the body typically by a thin insulating layer. This potential well can serve as a storage site for electrical charge carriers, such as those injected or transferred into the site in accordance with an analog signal input. These injected charges can then be introduced into the well by means of various techniques, as known in the art of semiconductor charge transfer devices. A plurality of these potential wells can thus be used for distributing analog charge over one or more of such wells.
In U.S. Pat. No. 3,958,210, issued to P. A. Levine on May 18, 1976, a system for analog-to-digital conversion was disclosed, including a semiconductor charge coupled device utilizing the properties of potential wells. However, the semiconductor charge coupled device portion of that system produced only a digital counting representation (unitary based number system) of the input analog signal, and the system required complex logic circuitry to convert this unitary digital (counting) representation into the ultimately desired representation in the binary number system. In other words, an analog input representing the number n was converted by the charge coupled device portion into a sequence purely of n "ones" (1,1,1, . . . 1,1,1) according to the unitary number system, rather than directly into the desired binary sequence of both "ones" and "zeros". Complex logic circuitry was thus required for subsequent conversion into a representation of the number n in the binary number system, that is, into a binary digital sequence, such as (1,0,1, . . . 0,1,1) representing the number n=1.times.2.sup.i + 0.times.2.sup.i-1 + 1.times.2.sup.i-2 + . . . + 0.times.2.sup.2 + 1.times.2.sup.1 + 1.times.2.sup.0, where i is selected such that 1.times.2.sup.i is the "most significant bit" in the number n. Also, the accuracy depends on all of the many wells being the same.
Accordingly, it would be desirable to have semiconductor apparatus for directly converting an analog signal directly into a binary digital number representation.